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Privacy PolicyNew Low-Density PolarFire® FPGAs
With their ultra-low power consumption, our latest low-density PolarFire FPGAs (MPF050T) and PolarFire SoC (MPFS025T) additions exceed the performance/power metrics of any low-density FPGA or SoC FPGA alternatives in the market. They deliver fast FPGA fabric and signal processing capabilities, the most capable transceivers and the industry’s only hardened application class RISC-V® architecture-based processor.
Microchip’s VectorBlox™ Accelerator
We offer a VectorBlox Accelerator Software Development Kit and neural networking IP, making it easy for you to program a trained neural network without prior FPGA experience. Make neural network algorithm development easy while leveraging low-power FPGAs and Smart Embedded Vision solutions.
Accelerate Smart Embedded Vision at the Edge
Supporting 4K resolutions with low-power 12.7 Gbps SerDes, PolarFire® FPGA Smart Embedded Vision solutions include video, imaging, machine learning IP and tools for accelerating designs that require high performance in low-power, small form-factors across the industrial, medical, broadcast, automotive, aerospace and defense markets.
Smart High Level Synthesis (HLS) Tool Suite
The need to combine performance with low power consumption in edge compute applications has driven demand for Field Programmable Gate Arrays (FPGAs) to be used as power-efficient accelerators while also providing flexibility and speeding time to market. However, a large majority of edge compute, computer vision and industrial control algorithms are developed natively in C++ by developers with little or no knowledge of underlying FPGA hardware. To empower this important development community, we've added an HLS design workflow called SmartHLS to our PolarFire FPGA families that greatly enhances productivity and ease of design by allowing C++ algorithms to be directly translated to FPGA-optimized Register Transfer Level (RTL) code.
Smart High Level Synthesis (HLS) Tool Suite
Smart High Level Synthesis (HLS) Tool Suite
The need to combine performance with low power consumption in edge compute applications has driven demand for Field Programmable Gate Arrays (FPGAs) to be used as power-efficient accelerators while also providing flexibility and speeding time to market. However, a large majority of edge compute, computer vision and industrial control algorithms are developed natively in C++ by developers with little or no knowledge of underlying FPGA hardware. To empower this important development community, we've added an HLS design workflow called SmartHLS to our PolarFire FPGA families that greatly enhances productivity and ease of design by allowing C++ algorithms to be directly translated to FPGA-optimized Register Transfer Level (RTL) code.
PolarFire® SoC Icicle Kit
PolarFire® SoC Icicle Kit
The PolarFire® SoC Icicle Kit is a low-cost development platform that enables the evaluation of the five-core RISC-V Linux®-capable microprocessor subsystem as well as deterministic real-time execution, all with market-leading power efficiency. The PolarFire SoC Icicle Kit is well suited for secure, reliable and power-efficient compute in imaging, Artificial Intelligence (AI)/Machine Learning (ML), industrial automation, Internet of Things (IoT), wireline access networks, automotive, aerospace and defense and many other applications.
Get Started with a PolarFire FPGA Development Kit
Get Started with a PolarFire FPGA Development Kit
Evaluate the capabilities and features of the PolarFire FPGA family with our development kits to speed up your development and accelerate your time to market.
